Chung-Hsing Hsu

Hi, my name is Chung-Hsing Hsu. I am currently a R&D staff member in the Application Performance Tools group at Oak Ridge National Laboratory (ORNL). My general interests are in algorithms, compilers, systems software and tools for the synergistic use of dynamic, heterogeneous hardware resources to enhance various types of quality of services such as performance and energy efficiency. My current research focus is on power aware environments for large-scale computing facilities and on efficient supercomputing enabled by software tools. I have studied efficient supercomputing since 1999. The title of my Ph.D. dissertation is Compiler-Directed Dynamic Voltage and Frequency Scaling for CPU Power and Energy Reduction. I received my Ph.D. degree in 2003 from Department of Computer Science at Rutgers University under the supevision of professor Ulrich Kremer. After graduation, I went to work for Los Alamos National Laboratory for about seven years. I started to work for ORNL in November 2009. If you have questions about my researches or are interested in collaborations, please feel free to contact me at HSUC _at_ ORNL _dot_ GOV. Have a nice day!

Publications

• C. Hsu, W. Feng, and S. Poole. An Adaptive Run-Time System for Improving Energy Efficiency. In Green Computing: Large-Scale Energy Efficiency, W. Feng (editor), Chapman and Hall/CRC, June 2012.

• C. Kartsaklis, O. Hernandez, C. Hsu, T. Ilsche, W. Joubert, and R. Graham. HERCULES: A Pattern Driven Code Transformation System. International Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS), May 2012.

• C. Hsu, J. Kuehn, and S. Poole. Towards Efficient Supercomputing: Searching for the Right Efficiency Metric. ACM/SPEC International Conference on Performance Engineering (ICPE), April 2012.

• C. Hsu and S. Poole. A Comparative Study of Runtime Systems for Energy Aware High Performance Computing. In Handbook of Energy-Aware and Green Computing, I. Ahmad and S. Ranka (editors), Chapman and Hall/CRC, January 2012.

• W. Ding, C. Hsu, O. Hernandez, B. Chapman, and R. Graham. Bioinspired Similarity-Based Planning Support for the Porting of Scientific Applications. Workshop on Parallel Architectures and Bioinspired Algorithms (WPABA), October 2011.

• A. Knebe et al. (36 authors). Haloes gone MAD: The Halo-Finder Comparison Project. Monthly Notices of the Royal Astronomical Society 415(3):2293--2318, August 2011.

• C. Hsu and S. Poole. Power Measurement for High Performance Computing: State of the Art. International Workshop on Power Measurement and Profiling (PMP), July 2011.

• J. Woodring, K. Heitmann, J. Ahrens, P. Fasel, C. Hsu, S. Habib, and A. Pope. Analyzing and Visualizing Cosmological Simulations with ParaView. The Astrophysical Journal Supplement Series 195(1):11, July 2011.

• R. Graham, P. Shamis, O. Hernandez, C. Kartsaklis, T. Mintz, and C. Hsu. A Programming Environment for Heterogeneous Multi-Core Computer Systems. Cray User Group (CUG), May 2011.

• C. Hsu and S. Poole. Power Signature Analysis of the SPECpower_ssj2008 Benchmark. IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), April 2011.

• J. Ahrens, K. Heitmann, M. Petersen, J. Woodring, S. Williams, P. Fasel, C. Ahrens, C. Hsu, and B. Geveci. Verification of Scientific Simulations via Hypothesis-Driven Comparative and Quantitative Visualization. IEEE Computer Graphics and Applications 30(6):16-28, November/December 2010.

• C. Hsu, J.P. Ahrens, and K. Heitmann. Verification of the Time Evolution of Cosmological Simulations via Hypothesis-Driven Comparative and Quantitative Visualization. IEEE Pacific Visualization Symposium, March 2010.

• S. Habib, A. Pope, Z. Lukic, D. Daniel, P. Fasel, N. Desai, K. Heitmann, C. Hsu, L. Ankeny, G. Mark, S. Bhattacharya, and J. Ahrens. Hybrid Petacomputing Meets Cosmology: The Roadrunner Universe Project. Journal of Physics: Conference Series 180, August 2009.

• C. Hsu and U. Kremer. Compiler-Directed Dynamic CPU Frequency and Voltage Scaling. In Designing Embedded Processors: A Low Power Perspective, J. Henkel and S. Parameswaran (editors), Springer, August 2007.

• W. Feng, A. Ching, and C. Hsu. Green Supercomputing in a Desktop Box. Workshop on High-Performance, Power-Aware Computing (HPPAC), March 2007.

• M. Gokhale, C. Rickett, and C. Hsu. Analyzing Benefits of FPGA Libraries for Scientific Applications. Reconfigurable Systems Summer Institute (RSSI), July 2006.

• M. Gokhale, C. Rickett, J. Tripp, C. Hsu, and R. Scrofano. Promises and Pitfalls of Reconfigurable Supercomputing. International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA), June 2006.

• S. Sharma, C. Hsu, and W. Feng. Making a Case for a Green500 List. Workshop on High-Performance, Power-Aware Computing (HPPAC), April 2006.

• C. Hsu and W. Feng. A Power-Aware Run-Time System for High-Performance Computing. International Conference on High-Performance Computing, Networking, and Storage (SC), November 2005.

• C. Hsu and W. Feng. A Feasibility Analysis of Power Awareness in Commodity-Based High-Performance Clusters. IEEE International Conference on Cluster Computing, September 2005.

• C. Hsu and W. Feng. Reducing Overheating-Induced Failures via Performance-Aware CPU Power Management. LCI International Conference on Linux Clusters: The HPC Revolution, April 2005.

• C. Hsu, W. Feng, and J. Archuleta. Towards Efficient Supercomputing: A Quest for the Right Metric. Workshop on High-Performance, Power-Aware Computing (HPPAC), April 2005.

• C. Hsu and W. Feng. Effective Dynamic Voltage Scaling through CPU-Boundedness Detection. Workshop on Power-Aware Computer Systems (PACS), December 2004.

• W. Feng and C. Hsu. The Origin and Evolution of Green Destiny. IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), April 2004.

• C. Hsu and U. Kremer. A Quantitative Analysis of the Tile Size Selection Algorithms. The Journal of Supercomputing 27(3):279-294, March 2004.

• C. Hsu and U. Kremer. The Design, Implementation, and Evaluation of a Compiler Algorithm for CPU Energy Reduction. ACM Conference on Programming Language Design and Implementation (PLDI), June 2003.

• H. Saputra, M. Kandemir, N. Vijaykrishnan, M.J. Irwin, J.S. Hu, C. Hsu, and U. Kremer. Energy-Conscious Compilation Based on Voltage Scaling. ACM Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), June 2002.

• C. Hsu and U. Kremer. Single Region vs. Multiple Regions: A Comparison of Different Compiler-Directed Dynamic Voltage Scheduling Approaches. Workshop on Power-Aware Computer Systems (PACS), February 2002.

• C. Hsu, U. Kremer, and M. Hsiao. Compiler-Directed Dynamic Frequency and Voltage Scheduling for Energy Reduction in Microprocessors. International Symposium on Low Power Electronics and Design (ISLPED), August 2001.

• C. Hsu and U. Kremer. Dynamic Voltage and Frequency Scaling for Scientific Applications. International Workshop on Languages and Compilers for Parallel Computing (LCPC), August 2001.

• C. Hsu, U. Kremer, and M. Hsiao, Compiler-Directed Dynamic Frequency and Voltage Scheduling. Workshop on Power-Aware Computer Systems (PACS), November 2000.

• C. Hsu and U. Kremer. A Stable and Efficient Loop Tiling Algorithm. The Mid-Atlantic Student Workshop on Programming Languages and Systems (MASPLAS), December 1999.

• C. Hsu and U. Kremer. IPERF: A Framework for Automatic Construction of Performance Prediction Models, Workshop on Profile and Feedback-Directed Compilation, October 1998.

• C. Hsu and J. Ho. Modeling the Performance of Hypercubes: A Case Study on Sorting Problem. International Conference on System Research, Informatics and Cybernetics, August 1991.